1. Technical Field of the Invention
The present invention generally relates to scanning and imaging techniques in failure analysis of electronic devices such as semiconductor integrated circuits, packages, boards, and the like. More particularly, and not by way of any limitation, the present invention is directed to a system and method for isolating failures in electronic devices using stimulus-induced fault testing (SIFT).
2. Description of Related Art
In the field of failure analysis of integrated circuits, isolating and diagnosing functional failures is a cardinal requirement. Traditional beam-based analytical techniques use a scanning laser or electron beam (e-beam) to induce a parametric shift, which is monitored through changes in current or voltage driven to the device. Deep submicron technologies and complex, multi-layered architectures prevalent today frustrate these analytical methods due to the nearly immeasurable parametric shifts externally caused by a small internal leakage path. Although these failures can sometimes be identified functionally by timing, temperature, or voltage dependencies, even the proximate location of the fault is difficult to isolate. Relatedly, field of view limitations inherent in today's beam-based techniques compound the difficulty due to the fact that a huge number of scans need to performed to cover a large die, resulting in an enormous amount of test points that require an inordinate period of time for completing the analysis.